Low Power Operational Amplifier In 0.13um Technology

Idris, Muhammad Idzdihar and Yusop, Norbayah and Mohd Chachuli, Siti Amaniah and Ismail, Mohd Mansor and Arith, Faiz and Darsono, Abd Majid (2015) Low Power Operational Amplifier In 0.13um Technology. Modern Applied Science, 9 (1). pp. 34-44. ISSN 1913-1844

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Low power is one of the most indispensable criteria in several of application. In this paper a low power operational amplifier consists of two stages and operates at 1.8V power. It is designed to meet a set of provided specification such as high gain and low power consumption. Designers are able to work at low input bias current and also at low voltage due to the unique behavior of the MOS transistors in sub-threshold region. This two-stage op-amp is designed using the Silterra 130nm technology library. The layout has been draw and its area had been calculated. The proposed two stage op-amp consists of NMOS current mirror as bias circuit, differential amplifier as the first stage and common source amplifier as the second stage. The first stage of an op-amp contributed high gain while the second stage contributes a moderate gain. The results show that the circuit is able to work at 1.8V power supply voltage (VDD) and provides gain of 69.73dB and 28.406MHz of gain bandwidth product for a load of 2pF capacitor. Therefore, the power dissipation and the consistency of this operational amplifier are better than previously reported operational amplifier.

Item Type: Article
Uncontrolled Keywords: Op-amp, Two-stage, Miller capacitor, Gain, IC MR, PSRR, CMRR, Slew rate, Low power, Power dissipation
Divisions: Faculty of Electronics and Computer Engineering > Department of Computer Engineering
Date Deposited: 28 Jan 2015 04:20
Last Modified: 21 Jun 2021 17:11
URI: http://eprints.utem.edu.my/id/eprint/13825
Statistic Details: View Download Statistic

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