Low Voltage CMOS Schmitt Trigger In 0.18μm Technology

Arith, Faiz and Idris, Muhammad Idzdihar and Zainudin, Muhammad Noorazlan Shah and Mohd Chachuli, Siti Amaniah (2013) Low Voltage CMOS Schmitt Trigger In 0.18μm Technology. IOSR Journal of Engineering (IOSRJEN), 3 (3). pp. 8-15. ISSN 2278-8719

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Abstract

This paper presents the effect of source voltage on performance of proposed Schmitt Trigger circuit. The proposed circuit was designed based on Conventional Schmitt Trigger by manipulating the arrangement of transistors and the width-length ratio. The simulation results have been carried out based on Mentor Graphics software in term of propagation delay. The circuit layout has been designed and checked by using design rule check (DRC) and layout versus schematic (LVS) method. From these results, the proposed full swing CMOS Schmitt Trigger was able to operate at low voltage (0.8V-1.5V)

Item Type:	Article
Uncontrolled Keywords:	DRC, LVS, Mentor graphic, Schmitt trigger, Width-length ratio
Divisions:	Faculty of Electronics and Computer Engineering > Department of Computer Engineering
Depositing User:	DR FAIZ ARITH
Date Deposited:	23 Dec 2013 03:24
Last Modified:	21 Jun 2021 19:23
URI:	http://eprints.utem.edu.my/id/eprint/10375
Statistic Details:	View Download Statistic

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