Design and development of deep learning convolutional neural network on an field programmable gate array.

Wong, Yan Chiew and Lee, Yan Qing (2018) Design and development of deep learning convolutional neural network on an field programmable gate array. Journal Of Telecommunication, Electronic And Computer Engineering (JTEC), 10 (4). pp. 25-29. ISSN 2180-1843

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Abstract

This paper presents the design and development of Convolutional Neural Network on Field Programmable Gate Array. In the recent work of deep learning Convolutional Neural Network, CNN is a challenging research area in both software and hardware implementation. Software implementations tend to be prohibitively slow considering that most of the neural networks run on sequentially operation architecture. Thus, the objective of this work is to design and develop deep learning CNN on FPGA based on the premise that hardware implementations that perform parallel computation of each neuron in the layers can be made faster. This work focuses on handwriting recognition where the machine has the ability to receive and interpret intelligible handwritten input from the sources. The speed of the CNN implemented on an FPGA was analyzed. Digits and numbers were successfully recognized by the developed system

Item Type:	Article
Uncontrolled Keywords:	Convolutional Neural Network, Field Programmable Gate Array
Divisions:	Faculty of Electronics and Computer Engineering > Department of Computer Engineering
Depositing User:	Norfaradilla Idayu Ab. Ghafar
Date Deposited:	09 May 2022 14:18
Last Modified:	09 May 2022 15:48
URI:	http://eprints.utem.edu.my/id/eprint/25147
Statistic Details:	View Download Statistic

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