Investigation Of Cu Interconnect Bulk Resistivity Deterioration As A Function Of Annealing Time

Abd Rahman, Md Nizam and Muhamad, Razali and Ahmad, Anuar Fadli and Raj, Adrian (2020) Investigation Of Cu Interconnect Bulk Resistivity Deterioration As A Function Of Annealing Time. [Technical Report] (Submitted)

Text Investigation Of Cu Interconnet Bulk Resistivity Deterioration As A Function Of Annealing Time.pdf - Submitted Version Restricted to Repository staff only Download (4MB)

Abstract

Copper layer metallization is one of the important processes in integrated circuit manufacturing. One of the issues faced in this process is the proneness of Cu interface diffusion as well as surface oxidation which degrade some of the Cu thin film properties. Due to this concern, most integrated circuit manufacturing facility imposed 12 hours maximum delay time between the Cu seed deposition and Cu electroplating step. However, there is lack of study and data to justify support this time restriction. This study investigated the effect of self-annealing time between Cu seeding process and Cu electroplating process to the sheet resistance, reflectance, and stress of the deposited film. The data indicated that the there is no significant deterioration or fluctuation in sheet resistance, reflectance, and stress beyond 12 hours delay time. This suggested that the imposed 12 hours maximum delay time between Cu seed and Cu electroplating process can be further extended, which will give greater flexibility for the manufacturing scheduling

Item Type:	Technical Report
Uncontrolled Keywords:	Integrated circuits, Thin films, Cu Interconnect
Divisions:	Faculty of Mechanical Engineering > Department of Automotive
Depositing User:	F Haslinda Harun
Date Deposited:	03 Jan 2022 17:27
Last Modified:	25 Jan 2023 11:44
URI:	http://eprints.utem.edu.my/id/eprint/25483
Statistic Details:	View Download Statistic

Actions (login required)

View Item