Hussin, Razaidi and Jidin, Aiman Zakwan and Loh, Wan Ying and Mispan, Mohd Syafiq and Lee, Weng Fook (2022) Automatic generation of user-defined test algorithm description file for memory BIST implementation. International Journal of Reconfigurable and Embedded Systems (IJRES), 11 (2). pp. 103-114. ISSN 2089-4864
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2022_AUTOMATIC GENERATION OF USER-DEFINED TEST ALGORITHM DESCRIPTION FILE FOR MEMORY BIST IMPLEMENTATION.PDF Download (1MB) |
Abstract
Memory built-in self-test (BIST) is a widely used technique to allow the self-test and self-checking of the embedded memories on chips after the fabrication process. It can be used by implementing a standard testing algorithm available in the EDA tool library or a user-defined algorithm (UDA). This paper presents the development of software that automatically generates a description file of a UDA to be deployed for memory BIST circuit implementation using Tessent memory BIST software. It comprises the test setup and also the microprogram coding for each instruction to be executed when performing tests on embedded memories. The proposed automation software was tested by using March SR as the input algorithm and the results obtained from the simulations show that the output test patterns generated by the implemented memory BIST match the expected patterns and passed all the tests, which validated the correct functionality of the UDA description file generation. The proposed automation software also fast generation the UDA description file, which was completed in less than 500 ms.
| Item Type: | Article |
|---|---|
| Uncontrolled Keywords: | Automation software, March algorithm, Memory BIST, Memory fault models, User-defined algorithm |
| Divisions: | Faculty of Electrical and Electronic Engineering Technology |
| Depositing User: | mr eiisaa ahyead |
| Date Deposited: | 28 Feb 2023 08:10 |
| Last Modified: | 28 Feb 2023 08:10 |
| URI: | http://eprints.utem.edu.my/id/eprint/26494 |
| Statistic Details: | View Download Statistic |
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