Design 4-to-1 multiplexer using universal gate with standard process technology

M. Napiah, Z. A. F. and Noor Haffizah , Ramli (2013) Design 4-to-1 multiplexer using universal gate with standard process technology. Journal of Telecommunication, Electronic and Computer Engineering (JTEC) , 5 (1). pp. 15-21. ISSN 2180-1843

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Abstract

Nowadays, CMOS is widely being used in integrated circuit design. In this project, the original 4-to-1 multiplexer schematic is redesign by changing the gate inside the multiplexer with CMOS universal gate. NAND gate will be used as the universal gate in this project. Through this project, SILVACO EDA tools are used to design the integrated circuit, schematic and layout. The schematic of NAND gate and 4-to-1 multiplexer is analyzed in order to meet the specification based on datasheet of NAND gate and 4-to-1 multiplexer. The result of the analyses can be used to determine the size of the transistors. The size of transistors can be used to design the layout of NAND and 4-to-1 multiplexer. At the end of the project, a new design of 4-to-1 multiplexer using universal gate will be produced and it meets the specification required in the datasheet of 4-to-1 multiplexer. Moreover, the equivalent layout of 4-to-1 multiplexer will also be produced.

Item Type:	Article
Uncontrolled Keywords:	CMOS, gate, multiplexer, IC, ICT, R&D, wafer
Subjects:	Q Science > QA Mathematics > QA75 Electronic computers. Computer science T Technology > TK Electrical engineering. Electronics Nuclear engineering
Divisions:	Faculty of Electronics and Computer Engineering > Department of Computer Engineering
Depositing User:	ZUL ATFYI FAUZAN MOHAMMED NAPIAH
Date Deposited:	11 Nov 2015 06:50
Last Modified:	11 Nov 2015 06:50
URI:	http://eprints.utem.edu.my/id/eprint/8531
Statistic Details:	View Download Statistic

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