Mohammed Napiah, Zul Atfyi Fauzan and Idris, Muhammad Idzdihar and Mohd Said, Muzalifah and Abdul Hamid, Afifah Maheran and Ali, Nur Alisa and Hamzah, Rostam Affendi (2011) Process and Characterization of Strained Silicon MOSFET Incorporating Dielectric Pocket (SDP-MOSFET). In: 2011 IEEE Regional Symposium on Micro and Nano Electronics (RSM 2011), September 28-30, 2011, Kota Kinabalu, Malaysia.
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Abstract
In this paper, we propose a fabrication process of Strained Silicon MOSFET incorporating Dielectric Pocket (SDP-MOSFET). By employing TCAD tools, a systematic process simulation in realizing the SDP-MOSFET structure is done successfully. By using vertical and horizontal doping profiles, 120 nm gate length with 12 nm gate oxide of the device is observed respectively. The combination of a Silicon Germanium (SiGe) layer and incorporation of dielectric pocket (DP) shows an improved in suppression of short channel effects (SCE) and allows the threshold voltage and the performance of the devices to be optimized. A low leakage current (IOFF), good drive current (ION), higher mobility and lower power consumption are obtained in SDP-MOSFET. Consequently, the threshold voltage (VT) is decreased accordingly in SDP-MOSFET devices and shows a better control of VT roll-off.
| Item Type: | Conference or Workshop Item (Paper) |
|---|---|
| Subjects: | T Technology > TK Electrical engineering. Electronics Nuclear engineering |
| Divisions: | Faculty of Electronics and Computer Engineering > Department of Computer Engineering |
| Depositing User: | ZUL ATFYI FAUZAN MOHAMMED NAPIAH |
| Date Deposited: | 15 Jul 2013 04:09 |
| Last Modified: | 28 May 2015 03:57 |
| URI: | http://eprints.utem.edu.my/id/eprint/8535 |
| Statistic Details: | View Download Statistic |
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