Pareto ANOVA Analysis For Two-stage Op-amp By Using CMOS 0.18 µm

Mohd Chachuli, Siti Amaniah and Fasyar, Puteri Nor Aznie and Soin, Norhayati and Mohammad Karim, Nissar and Yusop, Norbayah (2014) Pareto ANOVA Analysis For Two-stage Op-amp By Using CMOS 0.18 µm. Materials Science in Semiconductor Processing, 24. pp. 9-14. ISSN 1369-8001

PDF pareto_anova.pdf - Published Version Restricted to Registered users only until 2020. Download (386kB)

Abstract

This paper presents Pareto ANOVA analysis technique as an alternative analysis to analyze the selected optimization parameters in two-stage op-amp. Three input parameters and two output parameters based on standard L_27 (3^13) in Taguchi method have been used for optimization processes. Three input parameters are W/L ratio at transistor M8, M9 and M7 and also known as factor A, B and C. The aimed of two outputs in this op-amp are power dissipation and gain. This op-amp has been implemented by using CMOS 0.18 µm and has been verified by using Mentor Graphic. From the simulation results, it is found that level 16 has been chosen as the best selected combinations produced by Taguchi method. Next, Pareto ANOVA analysis will be implemented in the optimization process to ensure the selected combinations that produced by Taguchi method is the best combinations that able to optimum the value of gain and power in the two stage op-amp. From the analysis that have been done, it showed that factor B gives major impact in power dissipation and factor A and B give major impact to the gain.

Item Type:	Article
Uncontrolled Keywords:	Optimize, Op-amp, Taguchi, Power, Gain
Divisions:	Faculty of Electronics and Computer Engineering > Department of Industrial Electronics
Depositing User:	SITI AMANIAH MOHD CHACHULI
Date Deposited:	17 Sep 2014 11:40
Last Modified:	21 Jun 2021 18:52
URI:	http://eprints.utem.edu.my/id/eprint/13155
Statistic Details:	View Download Statistic

Actions (login required)

View Item