Ganasan, Umadewi (2018) Elimination of gold tarnish by post dip after gold plating process in flexible printed circuit board manufacturing. Masters thesis, Universiti Teknikal Malaysia Melaka.
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Elimination Of Gold Tarnish By Post Dip After Gold Plating Process In Flexible Printed Circuit Board Manufacturing.pdf - Submitted Version Download (2MB) |
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Elimination of gold tarnish by post dip after gold plating process in flexible printed circuit board manufacturing.pdf - Submitted Version Restricted to Registered users only until 29 August 2023. Download (22MB) |
Abstract
Flexible printed circuits (FPC) industry has high growth rate and high competition. FPC manufacturer should always ensure tighter tolerance to produce the highest quality of output products to their important and fulfill customer's high quality demand. Gold plating is often used in the electronics industry to provide an electrically conductive layer on copper base layers, typically in electrical connectors and printed circuit boards. ENIG provides excellent surface planarity with very good soldering and gold wire bonding. ENIG is now arguably the most used surface finish in the FPC industry due the growth and implementation of the RoHs regulation. There is a weak point in ENIG surface finishing. where RR10 chemical from subsequence process tend to attack the gold layer thereby causing tarnishing of its surface and formation of an oxide and or sulfide layer. Thus, the study help find root cause from subsequence processes that causing gold tarnish. A post dip after gold plating used ABC solution as barrier layer on top of Nickel-Gold layer. The new layer formation from the post dip was evaluated to ensure that they do not impair the essential surface properties such as contact resistance and solder or bonding functions needed for most connector applications. This study shown RR10 chemical that utilized as a part of stripping process which is end process after ENIG plating tend to oxidise ENIG surface. The ideal arrangement of handling parameters was observed to dipping time (2 minutes) temperature (27.3°C) and concentration (5.85pH) to accomplish the achieve desired quality failure mode (2 or 3 or 4) and resistance (3 -10kΩ). No effect on continuity as gold grains remain bonded and no corroded. The ABC solution coating does not impact properties and functionality of FPCs.
| Item Type: | Thesis (Masters) |
|---|---|
| Uncontrolled Keywords: | Flexible printed circuits |
| Subjects: | T Technology > T Technology (General) T Technology > TK Electrical engineering. Electronics Nuclear engineering |
| Divisions: | Library > Tesis > FKP |
| Depositing User: | Mohd. Nazir Taib |
| Date Deposited: | 22 Jan 2020 11:28 |
| Last Modified: | 11 Nov 2022 11:12 |
| URI: | http://eprints.utem.edu.my/id/eprint/23959 |
| Statistic Details: | View Download Statistic |
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