Performance Analysis Of Ultrathin Junctionless Double Gate Vertical MOSFETs

Salehuddin, Fauziyah and Kaharudin, Khairil Ezwan and Roslan, Ameer Farhan and Mohammed Napiah, Zul Atfyi Fauzan and Mohd Zain, Anis Suhaila (2019) Performance Analysis Of Ultrathin Junctionless Double Gate Vertical MOSFETs. Bulletin of Electrical Engineering and Informatics, 8 (4). pp. 1268-1278. ISSN 2302-9285

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Abstract

The main challenge in MOSFET minituarization is to form an ultra-shallow source/drain (S/D) junction with high doping concentration gradient, which requires an intricate S/D and channel engineering. Junctionless MOSFET configuration is an alternative solution for this issue as the junction and doping gradients is totally eliminated. A process simulation has been developed to investigate the impact of junctionless configuration on the double-gate vertical MOSFET. The result proves that the performance of junctionless double-gate vertical MOSFETs (JLDGVM) are superior to the conventional junctioned double-gate vertical MOSFETs (JDGVM). The results reveal that the drain current (ID) of the n-JLVDGM and p-JLVDGM could be tremendously enhanced by 57% and 60% respectively as the junctionless configuration was applied to the double-gate vertical MOSFET. In addition, junctionless devices also exhibit larger ION/IOFF ratio and smaller subthreshold slope compared to the junction devices, implying that the junctionless devices have better power consumption and faster switching capability

Item Type:	Article
Uncontrolled Keywords:	Channel length, ION/IOFF ratio, Off-state current, On-state current, Subthreshold slope, Ultrathin Junctionless, Double Gate Vertical MOSFETs
Divisions:	Faculty of Electronics and Computer Engineering
Depositing User:	Norfaradilla Idayu Ab. Ghafar
Date Deposited:	21 Oct 2020 08:58
Last Modified:	21 Oct 2020 08:58
URI:	http://eprints.utem.edu.my/id/eprint/24278
Statistic Details:	View Download Statistic

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